It is desirable during assembly of semiconductor devices to provide ESD protection by providing a low voltage snapback device that continues to serve a useful purpose after assembly. Snapback devices such as SCRs, LVTSCRs, snapback NMOS are commonly known in the art but typically define a high impedance, low leakage structure with high breakdown voltage that is not suitable for low voltage protection during passive mode while the semiconductor device is being assembled.
The present invention seeks to provide a method and structure that addresses this issue.